Simulating BRAM memory IP in Vivado Training

In the last lecture tutorial we had a look at how to create a Block RAM memory interface in Vivado.

• Full Vivado Course : http://augmentedstartups.info/xilinx

In this lecture we will look at how you simulate the BRAM IP block and test to see if it works. We used VHDL for the top layer from IP integrator. This training video is part of a full Xilinx Vivado course. You just need a Webpack License from Xilinx to get started.

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